Nonvolatile Memory (NVM) consists of the Program Flash Memory (PFM).
NVM is accessible by using both the FSR and INDF registers, or through the NVMREG register interface.
The write time is controlled by an on-chip timer. The write/erase voltages are generated by an on-chip charge pump rated to operate over the operating voltage range of the device.
NVM can be protected in two ways, by either code protection or write protection.
Code protection (CP bit in the Configuration Words) disables access, both reading and writing, to the PFM via external device programmers. Code protection does not affect the self-write and erase functionality. Code protection can only be reset by a device programmer performing a Bulk Erase to the device, clearing all nonvolatile memory, Configuration bits and User IDs.
Write protection prohibits self-write and erase to a portion or all of the NVM, as defined by the WRTSAF, WRTC, WRTB and WRTAPP bits of the Configuration Words. Write protection does not affect a device programmer’s ability to read, write or erase the device.