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##

# 1.1.3.2 ICM_INT_MSK

    typedef enum
    {
        ICM_INT_MSK_HASH_R0_MASK = ICM_IER_RHC(ICM_REGION0_MASK),
        ICM_INT_MSK_HASH_R1_MASK = ICM_IER_RHC(ICM_REGION1_MASK),
        ICM_INT_MSK_HASH_R2_MASK = ICM_IER_RHC(ICM_REGION2_MASK),
        ICM_INT_MSK_HASH_R3_MASK = ICM_IER_RHC(ICM_REGION3_MASK),
        ICM_INT_MSK_DIGEST_MISMATCH_R0_MASK = ICM_IER_RDM(ICM_REGION0_MASK),
        ICM_INT_MSK_DIGEST_MISMATCH_R1_MASK = ICM_IER_RDM(ICM_REGION1_MASK),
        ICM_INT_MSK_DIGEST_MISMATCH_R2_MASK = ICM_IER_RDM(ICM_REGION2_MASK),
        ICM_INT_MSK_DIGEST_MISMATCH_R3_MASK = ICM_IER_RDM(ICM_REGION3_MASK),
        ICM_INT_MSK_BUS_ERROR_R0_MASK = ICM_IER_RBE(ICM_REGION0_MASK),
        ICM_INT_MSK_BUS_ERROR_R1_MASK = ICM_IER_RBE(ICM_REGION1_MASK),
        ICM_INT_MSK_BUS_ERROR_R2_MASK = ICM_IER_RBE(ICM_REGION2_MASK),
        ICM_INT_MSK_BUS_ERROR_R3_MASK = ICM_IER_RBE(ICM_REGION3_MASK),
        ICM_INT_MSK_WRAP_R0_MASK = ICM_IER_RWC(ICM_REGION0_MASK),
        ICM_INT_MSK_WRAP_R1_MASK = ICM_IER_RWC(ICM_REGION1_MASK),
        ICM_INT_MSK_WRAP_R2_MASK = ICM_IER_RWC(ICM_REGION2_MASK),
        ICM_INT_MSK_WRAP_R3_MASK = ICM_IER_RWC(ICM_REGION3_MASK),
        ICM_INT_MSK_END_BIT_R0_MASK = ICM_IER_REC(ICM_REGION0_MASK),
        ICM_INT_MSK_END_BIT_R1_MASK = ICM_IER_REC(ICM_REGION1_MASK),
        ICM_INT_MSK_END_BIT_R2_MASK = ICM_IER_REC(ICM_REGION2_MASK),
        ICM_INT_MSK_END_BIT_R3_MASK = ICM_IER_REC(ICM_REGION3_MASK),
        ICM_INT_MSK_STATUS_UPDATE_R0_MASK = ICM_IER_RSU(ICM_REGION0_MASK),
        ICM_INT_MSK_STATUS_UPDATE_R1_MASK = ICM_IER_RSU(ICM_REGION1_MASK),
        ICM_INT_MSK_STATUS_UPDATE_R2_MASK = ICM_IER_RSU(ICM_REGION2_MASK),
        ICM_INT_MSK_STATUS_UPDATE_R3_MASK = ICM_IER_RSU(ICM_REGION3_MASK),
        ICM_INT_MSK_UNDEFINED_REG_ACCESS_MASK = ICM_IER_URAD_Msk,
        /* Force the compiler to reserve 32-bit memory for enum */
        ICM_INT_MSK_INVALID = 0xFFFFFFFF
    } ICM_INT_MSK;

Summary

ICM Interrupt Mask.

Description

This data type defines the ICM Interrupt sources.