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# 3.40.2 Clock Generator (CLOCK)

The Clock system generates and distributes the clock for the processor and peripherals. The Clock Generator is made up of:

- A low-power 32768 Hz crystal oscillator with Bypass mode

- A low-power embedded 32 kHz (typical) RC oscillator

- A 3 to 20 MHz crystal or ceramic resonator-based oscillator, which can be bypassed.

- A factory-trimmed embedded RC oscillator. Three output frequencies can be selected: 8/16/24 MHz. By default 8 MHz is selected.

- Two programmable PLLs, (PLLA input from 20 to 300 kHz, output clock range 48 to 120 MHz and PLLB input from 20 to 100KHz, output clock range 24 to 48MHz), capable of providing the clock MCK to the processor and to the peripherals.

The Clock Generator provides following clocks:

- SLCK, the slow clock, which is the only permanent clock within the system.

- MAINCK is the output of the main clock oscillator selection: either the crystal or ceramic resonator-based oscillator or 8/16/24 MHz RC oscillator.

- PLLACK is the output of the 48 to 120 MHz programmable PLL (PLLA).

- PLLBCK is the output of the 24 to 48MHz programmable PLL (PLLB).

The Power Management Controller (PMC) optimizes power consumption by controlling all system and user peripheral clocks. The PMC enables/disables the clock inputs to many of the peripherals and the Cortex-M4 processor.

The PMC provides the following clocks:

- MCK, the Master Clock, programmable from a few hundred Hz to the maximum operating frequency of the device. It is available to the modules running permanently, such as the Enhanced Embedded Flash Controller.

- Processor Clock (HCLK) , automatically switched off when entering the processor in Sleep Mode

- Free-running processor Clock (FCLK)

- The Cortex-M4 SysTick external clock

- Peripheral Clocks, provided to the embedded peripherals (USART, SPI, TWI, TC, etc.) and independently controllable. Some of the peripherals can be configured to be driven by MCK divided by 2, 4, 8.

- Programmable Clock Outputs (PCKx), selected from the clock generator outputs to drive the device PCK pins

- Clock sources independent of MCK and HCLK, provided by internal PCKx for FLEXCOM (USART/SPI/TWI), Timer, ADCC and PDMIC

## Using The Library

The Clock peripheral library initializes the clock system as configured by the user in the MCC Clock configurator. It can be accessed via the "Tools" drop down of the MPLAB Code Configurator menu bar.

## Library Interface

Clock Generator peripheral library provides the following interfaces:

Functions

Name | Description
--- | ---
CLOCK_Initialize | Initializes the clock for system and peripherals