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# 3.36.6 Cortex-M Cache Controller (CMCC)

The Cortex-M Cache Controller (CMCC) is a 4-Way set associative unified cache controller. It integrates a controller, a tag directory, data memory, metadata memory and a configuration interface.

## Using The Library

At runtime, I/D Cache can be enabled or disabled using the corresponding APIs (CMCC_Enable(I/D)Cache and CMCC_Disable(I/D)Cache). When the content of the cache becomes stale, it can be invalidated using the CMCC_InvalidateAll function.

## Library Interface

Cortex-M Cache Controller peripheral library provides the following interfaces:

Table 3-9.Functions
Name | Description
--- | ---
CMCC_Disable | Disable the cortex M cache controller
CMCC_EnableICache | Enables the Instruction cache
CMCC_DisableICache | Disables the Instruction cache
CMCC_EnableDCache | Enables the Data cache
CMCC_DisableDCache | Disables the Data cache
CMCC_InvalidateAll | Invalidates the complete cache