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Libero SoC Design Suite Help Documentation v2024.1
Libero SoC Design Suite Help Documentation v2024.1
  1. Home
  2. 21 Tcl Command Reference

    Information about Tcl Command Reference

  3. 21.8 SmartTime Tcl Commands

v2024.1

  • 1 What's New

    Information about what is new in Libero SoC Design Suite

  • 2 Download Help

    Information to help you download the Libero SoC Design Suite documentation

  • 3 SmartHLS Compiler

    Information about SmartHLS Compiler

  • 4 Installation and Licensing

    Information about Libero SoC software installation and licensing

  • 5 Design Flow

    Information about Design Flow

  • 6 Block Flow

    Information about Block Flow

  • 7 SmartDesign

    Information about SmartDesign

  • 8 Netlist Viewer

    Information about Netlist Viewer

  • 9 I/O Editor

    Information about I/O Editor

  • 10 PDC Commands

    Information about PDC commands for all families

  • 11 Chip Planner

    Information about Chip Planner

  • 12 Timing Constraints Editor

    Information about Timing Constraints Editor

  • 13 SmartTime Static Timing Analyzer

    Information about SmartTime Static Timing Analyzer

  • 14 SmartPower

    Information about SmartPower

  • 15 Programming and Debugging

    Information about Programming and Debugging

  • 16 Macro Library

    Information about Macro Library for SmartFusion2, IGLOO2 and PolarFire

  • 17 Custom Flow

    Information about Custom Flow

  • 18 Design Separation Methodology

    Information about Design Separation Methodology

  • 19 Microchip Separation Verification Tool

    Information about Microchip Separation Verification Tool

  • 20 PolarFire SoC Microcontroller Subsystem (MSS)

    Information about PolarFire SoC Microcontroller Subsystem (MSS)

  • 21 Tcl Command Reference

    Information about Tcl Command Reference

    • 21 Introduction
    • 21.1 Tcl Scripting Overview
    • 21.2 Building a Libero Design Using Tcl
    • 21.3 Project Manager Tcl Commands
    • 21.4 SmartDesign Tcl Commands
    • 21.5 HDL Tcl Commands
    • 21.6 Command Tools
    • 21.7 MSS Tcl Commands
    • 21.8 SmartTime Tcl Commands
      • 21.8.1 all_inputs

      • 21.8.2 all_outputs

      • 21.8.3 all_registers

      • 21.8.4 check_constraints

      • 21.8.5 clone_scenario

      • 21.8.6 create_clock

      • 21.8.7 create_generated_clock

      • 21.8.8 create_scenario

      • 21.8.9 create_set

      • 21.8.10 expand_path

      • 21.8.11 get_cells

      • 21.8.12 get_clocks

      • 21.8.13 get_current_scenario

      • 21.8.14 get_nets

      • 21.8.15 get_pins

      • 21.8.16 get_ports

      • 21.8.17 list_clock_groups

      • 21.8.18 list_clock_latencies

      • 21.8.19 list_clock_uncertainties

      • 21.8.20 list_clocks

      • 21.8.21 list_disable_timings

      • 21.8.22 list_false_paths

      • 21.8.23 list_generated_clocks

      • 21.8.24 list_input_delays

      • 21.8.25 list_max_delays

      • 21.8.26 list_min_delays

      • 21.8.27 list_multicycle_paths

      • 21.8.28 list_objects

      • 21.8.29 list_output_delays

      • 21.8.30 list_paths

      • 21.8.31 list_scenario

      • 21.8.32 read_sdc

      • 21.8.33 remove_all_constraints

      • 21.8.34 remove_clock

      • 21.8.35 remove_clock_groups

      • 21.8.36 remove_clock_latency

      • 21.8.37 remove_clock_uncertainty

      • 21.8.38 remove_disable_timing

      • 21.8.39 remove_false_path

      • 21.8.40 remove_generated_clock

      • 21.8.41 remove_input_delay

      • 21.8.42 remove_max_delay

      • 21.8.43 remove_min_delay

      • 21.8.44 remove_multicycle_path

      • 21.8.45 remove_output_delay

      • 21.8.46 remove_scenario

      • 21.8.47 remove_set

      • 21.8.48 rename_scenario

      • 21.8.49 report

      • 21.8.50 save

      • 21.8.51 set_clock_groups

      • 21.8.52 set_clock_latency

      • 21.8.53 set_clock_to_output

      • 21.8.54 set_clock_uncertainty

      • 21.8.55 set_current_scenario

      • 21.8.56 set_disable_timing

      • 21.8.57 set_external_check

      • 21.8.58 set_external_delay
      • 21.8.59 set_false_path

      • 21.8.60 set_input_delay

      • 21.8.61 set_input_jitter
      • 21.8.62 set_max_delay

      • 21.8.63 set_min_delay

      • 21.8.64 set_multicycle_path

      • 21.8.65 set_options

      • 21.8.66 set_output_delay

      • 21.8.67 set_system_jitter
      • 21.8.68 write_sdc

    • 21.9 SmartPower Tcl Commands
    • 21.10 Programming and Configuration Tcl Commands
    • 21.11 FlashPro Express Tcl Commands
    • 21.12 Configure JTAG Chain Tcl Commands
    • 21.13 SmartDebug Tcl Commands
    • 21.14 System Builder Tcl Commands
    • 21.15 Simultaneous Switching Noise Analyzer (SSNA) Tcl Commands

    • 21.16 HSM Tcl Commands

    • 21.17 Derive Constraints Tcl Commands
  • 22 More Information

    Additional information about other Microchip products

  • 23 Technical Support
  • 24 About Microchip

    More information about Microchip

21.8 SmartTime Tcl Commands

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