21.3.89 set_modelsim_options
(Ask a Question)Description
This Tcl command sets your ModelSim simulation options. You can set change how Libero SoC handles Do files in simulation, import your own Do files, set simulation run time, and change the DUT name used in your simulation. You can sets options from the
menu. Default values are used if parameters are omitted.set_modelsim_options \
[-use_automatic_do_file "TRUE | FALSE"] \
[-user_do_file {path}] \
[-sim_runtime {value}] \
[-tb_module_name {value}] \
[-tb_top_level_name {value}] \
[-include_do_file "TRUE | FALSE" \
[-included_do_file {value}] \
[-type {value}] \
[-resolution {value}] \
[-add_vsim_options {value}] \
[-display_dut_wave "TRUE | FALSE"] \
[-log_all_signals "TRUE | FALSE"] \
[-do_file_args {value}] \
[-dump_vcd "TRUE | FALSE"] \
[-vcd_file "VCD file name"] \
[-sdf_corner "sdf_corner"] \
[-verilog {value}] \
[-VHDL {value}] \
[-disable_pulse_filtering "TRUE | FALSE"] \
[-timeunit {value}] \
[-timeunit_base {value}] \
[-precision {value}] \
[-precision_base {value}]
Arguments
Parameter | Type | Description |
---|---|---|
use_automatic_do_file | boolean | Automatically create a DO file that will enable you to simulate your design. Valid values are:
|
user_do_file | string | Specifies the location of your user-defined *.do file. |
sim_runtime | number and unit of time | Sets your simulation runtime. It is optional. Value is the number and unit of time, such as {1000 ns}. |
tb_module_name | string | Specifies your test bench module name, where value is the name. Default value is "test bench". |
tb_top_level_name | string | Sets the top-level instance name in the test bench, where value is the name. Default is <top>_0. |
include_do_file | boolean | Enables you to include DO file. Valid values are:
|
included_do_file | string | Specifies the path of the included *.do file, where value is the name of the file. Including a DO file enables you to customize the set of signal waveforms that will be displayed in ModelSim. Specify this argument with -include_do_file argument. Default is work.do. |
type | string | Resolution type; possible values are:
|
resolution | unit of time | Sets your resolution value. Value is the number and unit of time, such as {1ps}. The default is family-specific, but you can customize it to fit your needs. |
add_vsim_options | string | Adds more Vsim options, where value specifies the option(s). |
display_dut_wave | boolean | Enables ModelSim to display signals for the tested design; possible values are:
|
log_all_signals | boolean | Saves and logs all signals during simulation.
|
do_file_args | list of strings | Specifies *.do file command parameters. Default is empty. |
dump_vcd | boolean | Dumps the VCD file when simulation is complete; possible values are:
|
vcd_file | string | Specifies the name of the dumped VCD file, where value is the name of the file. Default is "power.vcd". |
sdf_corner {parameter} | string | Sets the corner on which the post layout simulation will be done.
|
verilog | integer | HDL Testbench file type can be either Verilog or VHDL; possible values are: 1 or 0. Default is 0. |
VHDL | integer | HDL Testbench file type can be either Verilog or VHDL; possible values are: 1 or 0. Default is 0. |
disable_pulse_filtering | boolean | Specifies to enable/disable pulse filtering during SDF based simulations.
|
timeunit | integer | TimeScale time unit value. Default is 1. |
timeunit_base | unit of time | TimeScale precision base value. The default setting is ns; possible values are:
|
precision | integer | TimeScale precision value. Default is 100. |
precision_base | unit of time | TimeScale precision base value. The default setting is ps; possible values are:
|
Supported Families
Supported Families |
---|
PolarFire® |
RTG4™ |
SmartFusion® 2 |
IGLOO® 2 |
Example
Sets ModelSim options to use the automatic *.do file, sets simulation runtime to 1000ns, sets the testbench module name to "testbench", sets the testbench top level to top_0, sets simulation type to "max", resolution to 1ps, adds no vsim options, does not log signals, adds no additional DO file arguments, dumps the VCD file with a name power.vcd.
set_modelsim_options -use_automatic_do_file 1 -sim_runtime {1000ns} \
-tb_module_name {testbench} -tb_top_level_name {top_0} -include_do_file 0 \
-type {max} -resolution {1ps} -add_vsim_options {} -display_dut_wave 0 \
-log_all_signals 0 -do_file_args {} - dump_vcd 0 -vcd_file {power.vcd}