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# 3.4 Software Features and Enhancements

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## 3.4.1 Enhanced copy and paste functionality for SmartDesign HDL+ cores

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Starting with the Libero SoC v2025.1 release, HDL+ core instances can be selected and copied from a SmartDesign and pasted into a new SmartDesign in any order, regardless of their original creation and instantiation sequence, without corrupting the SmartDesign canvas component and resulting in crashes.

Additionally, crashes related to hierarchical SmartDesign creation with HDL+ core instances being selected have also been resolved.

## 3.4.2 Added STAPL Support to Program Micron MT25QL01G SPI-Flash

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Libero SoC v2025.1 supports the export of STAPL files to program Micron MT25QL01G and MT25QL02G SPI-flash devices.

## 3.4.3 Enhanced the Automatic Programmer Detection Functionality

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The Libero SoC 2025.1 release enhanced the programmer detection functionality in batch mode to automatically use the single programmer that is connected to the machine without having to explicitly specify it in TCL commands.

## 3.4.4 Availability of Multiple Servers in LM_LICENSE_FILE Environment Variable

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Libero SoC v2025.1 supports automatic license checkout from a secondary floating license server specified in the LM_LICENSE_FILE environment variable. If the primary server is exhausted, the secondary server is used to check out a license. A Libero instance can also be opened on another machine using the secondary server.

## 3.4.5 Synplify Pro ME Upgrade

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The Libero SoC v2025.1 release supports Synplify Pro ME version V-2023.09M-5, which introduces additional support for the following features in large memory blocks:

- RTG4 Dual-port Write-byte Enable
- Improved DSP inference report
- Complete TMR report
- Enhanced Performance QoR

## 3.4.6 Identify ME Tool Upgrade

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Libero SoC v2025.1 supports Identify ME version V-2023.09M-5, which introduces additional support for RTG4 Pre-arm trigger. This version provides debug support for the following devices as well:

- RT PolarFire
- RT PolarFire SoC

## 3.4.7 ModelSim ME Pro and QuestaSim Pro ME Simulator Tools Upgrade

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The Libero SoC v2025.1 release supports the upgraded v2024.3 versions of ModelSim ME Pro and QuestaSim ME simulation tools.

To enable better simulation runtime, QuestaSim ME optimizes designs during compilation by default. This optimization can sometimes result in the removal of signals or objects that the user might want to observe during simulation. The historical vsim argument called -novopt is now deprecated; instead, the simulator supports the -voptargs parameter, which allows users to add arguments that specify the level of optimization applied and the level of design object visibility during simulation. For example, the vsim argument -voptargs=+acc can be used to enable access to design objects that might otherwise be optimized away. For additional information, refer to the appropriate user guide from Siemens EDA (formerly Mentor Graphics).

Note: Libero SoC v2025.1 is the final release to use ModelSim ME Pro as the default simulator.

## 3.4.8 Improved Smart Time Analysis

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The Libero SoC 2025.1 release has the following significant enhancements to the SmartTime tool:

- Ability to override the jitter value with clock uncertainty
- Support for Negative Uncertainty Values in SDC Editor
- Refined exception constraint resolution using get_clocks
- Generated clock duty-cycle update

## 3.4.9 Improved Error Messages Related to Networking

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Feedback messages from network connectivity checks have been improved. In particular, the messaging for failures related to the download_latest_cores command has been enhanced for better clarity and troubleshooting.

## 3.4.10 New QT Installer for Libero SoC and Standalone Installers for Program and Debug, PolarFire SoC MSS, and MegaVault

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The Libero SoC 2025.1 release introduces a new QT-based installer that serves as a single point installation source for all Libero SoC products and, at the same time, significantly reduces installation time. This also addresses an installation issue relating to long paths on Windows.

Libero SoC Design Suite can now be installed in two ways:

- Full Installation: Installs the complete Microchip FPGA Design Suite, including MegaVault and drivers.
- Custom Installation: Allows you to select the software to install based on your application requirements.

Megavault provides a rich library of ready-to-use, high-quality IP cores, enabling faster FPGA development with reliable, pre-verified solutions. For more information on the installation process, see Libero SoC Software Installation Guide.

Rev: 2026.1

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.