Jump to main content

# 9.4 Software Features and Enhancements

(Ask a Question)

## 9.4.1 Filtering the SmartDesign Canvas

(Ask a Question)

To focus on specific design parts of a SmartDesign, such as AMBA sub-systems, clock/reset structures, and high-fanout data paths, Libero SoC v2022.2 enhances the Smart Search and Connect window to filter the canvas layout-cones. The Smart Search and Connect tool allows you to search for objects of interest in SmartDesign. The new Filter button allows you to filter the SmartDesign canvas to display only searched objects.

For more information, see the SmartDesign User Guide .

## 9.4.2 Constraint Files in the Manifest Text Files of Generated Core IPs

(Ask a Question)

When configuring and generating IP catalog core components, the paths to the component generated constraint files (`.sdc`, `.pdc`, and `.ndc`) are now reported under the Constraint Files section of the core component's manifest report.

For more information on how to use these core component generated constraint files in the Custom Flow and provide them as an input to the Derive Constraints utility, see the Custom Flow User Guide .

## 9.4.3 SmartPower VCD Multi-file Annotation

(Ask a Question)

SmartPower in Libero SoC v2022.2 allows you to import multiple VCD files added for different blocks/modules.

## 9.4.4 Check Box to Initiate sNVM Master Key

(Ask a Question)

In Libero SoC 2022.2, a check box has been added to Design Initialization Data and Memories Flow > sNVM tab to initiate an sNVM master key while generating sNVM. This is required when adding ciphertext authenticated clients to the sNVM page.

## 9.4.5 Timing Report Explorer - Graphical Statistics

(Ask a Question)

Timing Report Explorer in Libero SoC v2022.2 adds new Cell vs Net Breakdown charts in the Insights menu of Graphical Statistics.

## 9.4.6 SynplifyPro and Identify

(Ask a Question)

The Synplify Pro and Identify tools bundled in Libero SoC v2022.2 have been upgraded to SynplifyPro S-2021.09M-SP1 and Identify Debugger S-2021.09M-SP1 versions. Key enhancements are:

- PolarFire: decomposition of wide multipliers into fixed base multipliers and fabric adders.
- Treat the VHDL logical library as WORK by default.
- Do not perform TMR on the driver and synchronizer flip flops on safe CDC path if the attribute `syn_radhardlevel=tmr` is applied on the top-level module or sub module.

Decomposition of wide multipliers into fixed base multipliers and fabric adders will be used for obtaining the sum of the partial products. For the base multiplier, implementation will be done with cascading of MATH blocks. The following new project setting controls the size of the base multiplier: `set_option -act_wide_mul_size 35`.

## 9.4.7 Improved Libero Installation

(Ask a Question)

The wizard for installing Libero SoC v2022.2 has been streamlined and simplified while allowing you to control what gets installed. There are also numerous improvements on Linux installation. Instead of downloading a full Libero suite installer, users can download a small web installer and select the necessary components they want. A new `launch_installer.sh` script allows you to install pre-installation library requirements. The system library requirement post-installation process performance has also improved.

Rev: 2026.1

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.