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# 7.4 Software Features and Enhancements

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## 7.4.1 Timing Report Explorer Graphical Statistics

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The Insights menu has the new option Logic Level Distribution option. When this option is selected, every stack/bar in the distribution chart represents the number of paths that have a logic count equal to the bar number.

## 7.4.2 SmartPower Runtime and Memory Improvements for Probability-Based Table

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Restructured the SmartPower Frequency and Probability tables to load data dynamically. Memory and Runtime improvements are observed in SmartPower GUI for larger designs. The improvements are about 25% for memory and 15% for run-time.

## 7.4.3 SmartDebug Unlock Debug Features via One-time Passkey Protocol on an HSM-programmed Device

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SmartFusion2, IGLOO2, PolarFire, RT PolarFire, and PolarFire SoC allow you to unlock the Debug features on the device programmed in HSM Flow. Devices that are programmed in HSM Flow have their plain text passkey match operation disabled, which prevents you from unlocking (matching DPK) without HSM.

## 7.4.4 New Synplify Version

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The Synplify Pro and Identify tools bundled in Libero SoC v2022.3 have been upgraded to SynplifyPro S-2021.09M-SP2 and Identify Debugger S-2021.09M-SP2 versions. Key enhancements are:

- Post Synthesis netlist has been enhanced for VHDL constructs that have real number subtraction to eliminate post-synthesis simulation and functional mismatches vs. pre-synthesis RTL simulations.
- SynplifyPro supports URAM inference for array initialization constructs with memory depth of 2 with the `syn_ramstyle` attribute set to uram.
- VM netlist with long wire names has been simplified.

## 7.4.5 Installer Improvements

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Starting with Libero SoC v2022.3, the Libero SoC Linux installation creates a Libero shortcut on the display.

Rev: 2025.2

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.