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# 1.3 Software Features and Enhancements

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This section describes new software features and enhancements introduced in the Libero® SoC v2026.1 Design Suite.

## 1.3.1 Simulator Updates

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This section describes simulator updates introduced in Libero® SoC v2026.1.

### 1.3.1.1 Version Upgrades

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Libero® SoC v2026.1 updates simulator support to QuestaSim ME Pro 2025.3 and ModelSim ME Pro 2025.3, with QuestaSim ME Pro as the default simulator and ModelSim ME Pro available as an optional simulator.

This release also supports Visualizer debug flows. Visualizer is the unified debug environment for QuestaSim and is available as an alternative to the classic simulation debug flow. The Visualizer debug flow uses the `-access`/`-debug` options instead of the legacy `+acc` flow.

The following example shows the basic syntax for running the Visualizer flow:

    vsim -voptargs="-debug -designfile design.bin" -qwavedb=+signal+memory

For more information about the Visualizer, see the documentation available with the QuestaSim installation. You can also refer to the ModelSim_to_QuestaSim_Migration_User_Guide.

### 1.3.1.2 Simulation Compile Control

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Simulation flows now allow users to pass custom arguments to `vlog` and `vcom` commands. This enhancement gives users more control over Verilog and VHDL compilation options during simulation.

## 1.3.2 Remote Programming Server Support for Libero® SoC and FlashPro Express

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Libero SoC v2026.1 enables Remote Programming Server support for Libero SoC and FlashPro Express, allowing users to configure and use programming hardware connected to a remote machine. Existing workstation-mode behavior remains unchanged, while the new remote option provides greater flexibility for shared or centralized programming setups.

## 1.3.3 Standalone SmartDebug Remote Workflows

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Libero® SoC v2026.1 enables remote programming and debug workflows in standalone SmartDebug. This support includes remote server connections, programmer management, chain construction and scanning, programming actions, debug features, and multi-client usage.

## 1.3.4 Netlist Viewer Displays CFG Macro Initialization Strings

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Libero® SoC v2026.1 enhances the Netlist Viewer to display initialization strings for CFG macros. This update makes it easier for users to inspect configuration macro initialization details during design review and debug.

## 1.3.5 Tcl Export Flow

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Libero® SoC v2026.1 improves hierarchical export of component descriptions to Tcl by addressing issues related to HDL folder handling. This update improves reliability when exporting component-description information for hierarchical design flows.

## 1.3.6 SmartDesign Tcl

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Libero® SoC v2026.1 improves the `sd_create_pin_group` Tcl command to correctly handle cases where an existing pin-group member is moved to another group. This update improves pin-group management in SmartDesign Tcl flows.

## 1.3.7 Synplify Pro ME and Identify ME

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The Libero® SoC v2026.1 release supports the upgraded version, Y-2026.03M, of Synplify Pro ME and Identify ME Debugger tools.

## 1.3.8 Platform OS Updates

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Libero® SoC v2026.1 extends platform operating system support to Red Hat Enterprise Linux (RHEL) 9, AlmaLinux 9, and Ubuntu 24.04.

Rev: 2026.1

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.