Basic Application Schematic

A basic application schematic of the AT86RF212B with a single-ended RF connector is shown in the figure below. The 50Ω single-ended RF input is transformed to the 100Ω differential RF port impedance using balun B1. The capacitors C1 and C2 provide AC coupling of the RF input to the RF port. If the balun pins at the differential side provide no DC path to ground and to the single-ended pin, the capacitors are not necessary.

Regulatory rules like FCC 47 CFR Section 15.247 [5], ETSI EN 300 220-1 [6], and ERC/REC 70-03 [7] may require an external filter F1, depending on used transmit power levels.

Figure . Basic Application Schematic

The power supply decoupling capacitors (CB2, CB4) are connected to the external analog supply pin 28 (EVDD) and external digital supply pin 15 (DEVDD). Capacitors CB1 and CB3 are bypass capacitors for the integrated analog and digital voltage regulators to ensure stable operation. All bypass capacitors should be placed as close as possible to the pins and should have a low-resistance and low-inductance connection to ground to achieve the best performance.

The crystal (XTAL), the two load capacitors (CX1, CX2), and the internal circuitry connected to pins XTAL1 and XTAL2 form the crystal oscillator. To achieve the best accuracy and stability of the reference frequency, large parasitic capacitances should be avoided. Crystal lines should be routed as short as possible and not in proximity of digital I/O signals. This is especially required for the High Data Rate Modes.

Crosstalk from digital signals on the crystal pins or the RF pins can degrade the system performance. Therefore, a low-pass filter (C3, R1) is placed close to the CLKM output pin to reduce the emission of CLKM signal harmonics. This is not needed if pin 17 (CLKM) is not used as a microcontroller clock source. In this case, pin 17 (CLKM) output should be disabled during device initialization.

The ground plane of the application board should be separated into four independent fragments: the analog, the digital, the antenna, and the XTAL ground plane. The exposed paddle shall act as the reference point of the individual grounds.
Note:
  • The pins DIG1, DIG2, DIG3, and DIG4 are connected to ground in the Basic Application Schematic; refer to the figure aboe. Special programming of these pins requires a different schematic; refer to the Extended Feature Set Application Schematic.
Table . Exemplary Bill of Materials (BoM) for Basic Application Schematic.
Symbol Description Value Manufacturer Part Number Comment
B1 SMD balun 800 – 1000MHz

Wuerth

JTI

748431090

0900BL18B100

F1 SMD low pass filter 902 – 928MHz

Wuerth

JTI

748131009

0915LP15A026

B1 + F1

(alternatively)

Balun/Filter combination 863 – 928MHz JTI 0896FB15A0100
779 – 787MHz JTI 0783FB15A0100

CB1

CB3

LDO VREG

bypass capacitor

1mF

AVX

Murata

0603YD105KAT2A

GRM188R61E105KA12

X5R, 10%, 16V

(0603)

CB2

CB4

Power supply bypass capacitor

X5R, 15%, 25V

(0603)

CX1, CX2

Crystal load capacitor

12pF

AVX

Murata

06035A120JA

GRM1555C1H120JA01

C0G, 5%, 50V

(0402 or 0603)

C1, C2

RF coupling capacitor

100pF

Epcos

Epcos

AVX

B37930

B37920

06035A680JAT2A

C0G, 5%, 50V

(0402 or 0603)

C3

CLKM low-pas filter capacitor

2.2pF

AVX

Murata

06035A229DA

GRP1886C1H2R0DA01

COG, ±0.5pF, 50V

(0603)

Designed for fCLKM = 1MHz

R1

CLKM low-pass filter resistor

680W Designed for fCLKM = 1MHz
XTAL Crystal

CX-4025 16MHz

SX-4025 16MHz

ACAL Taitjen

Siward

XWBBPL-F-1

A207-011