RD0I2C
I2C Pad RD0 Control Register
| Name: | RD0I2C |
| Address: | 0x282 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SLEW[1:0] | TH[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 7:6 – SLEW[1:0] I2C Specific Slew Rate Limiting Control
| Value | Description |
|---|---|
| 1 |
I2C specific slew rate limiting is enabled. Standard pad slew limiting is disabled. The SLRxy bit is ignored |
| 0 | Standard GPIO Slew Rate; enabled/disabled via SLRxy bit |
Bits 1:0 – TH[1:0] I2C Input Threshold Selection
| Value | Description |
|---|---|
| 11 | SMBus 3.0 (1.35V) input threshold |
| 10 | SMBus 2.0 (2.1 V) input threshold |
| 01 | I2C-specific input thresholds |
| 00 | Standard GPIO Input pull-up, enabled via INLVLxy registers |