Contents

2. Silicon Errata Issues 2.1. Module: Analog-to-Digital Converter with Computation (ADCC) 2.1.1. Capacitive Voltage Divider (CVD) 2.1.2. Double Sample Conversions 2.2. Module: Oscillator 2.2.1. Maximum Clock Frequency Limited to 2 MHz for XT Mode 2.3. Module: I2C 2.3.1. The I2CxADR0/1/2/3 Registers Have Incorrect Reset Value 2.3.2. The I2C Start and/or Stop Flags May Be Set When I2C Is Enabled 2.4. Module: SRAM 2.4.1. SRAM Read-Back 2.5. Module: In-Circuit Debug 2.5.1. Software Breakpoints Are Not Available 2.6. Module: SMT 2.6.1. Reset Bit 2.7. Module: Universal Asynchronous Receiver Transmitter 2.7.1. UART TXDE Signal May go Low Before The STOP Bit Has Been Entirely Transmitted. 3. Data Sheet Clarifications 3.1. Memory Programming Specifications 3.2. UART Baud Rate Equation 4. Appendix A: Revision History The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service