Loads one byte from the data space to a register. For parts with SRAM, the data space consists of the Register File, I/O memory, and internal SRAM (and external SRAM if applicable). For parts without SRAM, the data space consists of the register file only. In some parts the Flash memory has been mapped to the data space and can be read using this command. The EEPROM has a separate address space.
A 7-bit address must be supplied. The address given in the instruction is coded to a data space address as follows:
ADDR[7:0] = (INST[8], INST[8], INST[10], INST[9], INST[3], INST[2], INST[1], INST[0])
Memory access is limited to the address range 0x40...0xbf.
This instruction is not available in all devices. Refer to the device specific instruction set summary.
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Operation: |
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(i) |
Rd ← (k) |
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Syntax: |
Operands: |
Program Counter: |
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(i) |
LDS Rd,k |
16 ≤ d ≤ 31, 0 ≤ k ≤ 127 |
PC ← PC + 1 |
16-bit Opcode:
| 1010 | 0kkk | dddd | kkkk |