Status Register (SREG) and Boolean Formula

I	T	H	S	V	N	Z	C
–	–	–	⇔	⇔	⇔	⇔	⇔

S

N ⊕ V, for signed tests.

V

Rdh7 • R15

Set if two’s complement overflow resulted from the operation; cleared otherwise.

N

R15

Set if MSB of the result is set; cleared otherwise.

Z

R15 • R14 • R13 • R12 • R11 • R10 • R9 • R8R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0

Set if the result is $0000; cleared otherwise.

C

R15 • Rdh7

Set if there was carry from the MSB of the result; cleared otherwise.

R (Result) equals Rdh:Rdl after the operation (Rdh7-Rdh0 = R15-R8, Rdl7-Rdl0=R7-R0).

Example:

adiw r25:24,1 ; Add 1 to r25:r24
adiw ZH:ZL,63 ; Add 63 to the Z-pointer(r31:r30)