Subtracts one -1- from the contents of register Rd and places the result in the destination register Rd.
The C Flag in SREG is not affected by the operation, thus allowing the DEC instruction to be used on a loop counter in multiple-precision computations.
When operating on unsigned values, only BREQ and BRNE branches can be expected to perform consistently. When operating on two’s complement values, all signed branches are available.
Operation: |
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(i) |
Rd ← Rd - 1 |
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Syntax: |
Operands: |
Program Counter: |
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(i) |
DEC Rd |
0 ≤ d ≤ 31 |
PC ← PC + 1 |
16-bit Opcode:
1001 | 010d | dddd | 1010 |