Loads one byte pointed to by the Z-register into the destination register Rd. This instruction features a 100% space effective constant initialization or constant data fetch. The Program memory is organized in 16-bit words while the Z-pointer is a byte address. Thus, the least significant bit of the Z-pointer selects either low byte (ZLSB = 0) or high byte (ZLSB = 1). This instruction can address the first 64KB (32K words) of Program memory. The Z-pointer Register can either be left unchanged by the operation, or it can be incremented. The incrementation does not apply to the RAMPZ Register.
Devices with Self-Programming capability can use the LPM instruction to read the Fuse and Lock bit values. Refer to the device documentation for a detailed description.
The LPM instruction is not available in all devices. Refer to the device specific instruction set summary.
The result of these combinations is undefined:
LPM r30, Z+
LPM r31, Z+
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Operation: |
Comment: |
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(i) |
R0 ← (Z) |
Z: Unchanged, R0 implied destination register |
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(ii) |
Rd ← (Z) |
Z: Unchanged |
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(iii) |
Rd ← (Z) Z ← Z + 1 |
Z: Post incremented |
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Syntax: |
Operands: |
Program Counter: |
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(i) |
LPM |
None, R0 implied |
PC ← PC + 1 |
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(ii) |
LPM Rd, Z |
0 ≤ d ≤ 31 |
PC ← PC + 1 |
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(iii) |
LPM Rd, Z+ |
0 ≤ d ≤ 31 |
PC ← PC + 1 |
16-bit Opcode:
| (i) | 1001 | 0101 | 1100 | 1000 |
| (ii) | 1001 | 000d | dddd | 0100 |
| (iii) | 1001 | 000d | dddd | 0101 |