What Has Changed

On tinyAVR® 1-series devices, the Flash memory is included in the CPU data space. This means that it shares the same address space and instructions as SRAM, EEPROM, and I/O registers. This data space is accessible through the use of LD/ST instructions in assembly. On some of the older tinyAVR devices, Flash memory is accessible only through the LPM and SPM instructions. In tinyAVR 1-series devices, the LPM instruction is still available, but the SPM instruction has been removed. For the LPM instruction, address 0x0000 is the start of flash, but for LD and ST it is 0x8000 as shown in the memory map below.
Figure 1. Memory Map of tinyAVR 1-series Devices

In addition to these differences, writing to Flash must now be implemented by using the NVM controller. Previously this was done using a combination of the Z-pointer and the SPMCTRL register.