mie)Individual interrupts are enabled by setting the appropriate bit in the
mie register described in the following table.
| Bits | Field Name | Attributes | Description |
|---|---|---|---|
| 0 | Reserved | WIRI | — |
| 1 | SSIE | RW | Supervisor Software Interrupt Enable |
| 2 | Reserved | WIRI | — |
| 3 | MSIE | RW | Machine Software Interrupt Enable |
| 4 | Reserved | WIRI | — |
| 5 | STIE | RW | Supervisor Timer Interrupt Enable |
| 6 | Reserved | WIRI | — |
| 7 | MTIE | RW | Machine Timer Interrupt Enable |
| 8 | Reserved | WIRI | — |
| 9 | SEIE | RW | Supervisor Global Interrupt Enable |
| 10 | Reserved | WIRI | — |
| 11 | MEIE | RW | Machine Global Interrupt Enable |
| [15:12] | Reserved | WIRI | — |
| 16 | LIE0 | RW | Local Interrupt 0 Enable |
| 17 | LIE1 | RW | Local Interrupt 1 Enable |
| 18 | LIE2 | RW | Local Interrupt 2 Enable |
| ... | |||
| 63 | LIE47 | RW | Local Interrupt 47 Enable |