An interrupt priority threshold can be set using the Threshold register. The Threshold register is a WARL field and a maximum threshold of 7 is supported. The processor core masks the PLIC interrupts that have a priority less than or equal to threshold. For example, a threshold value of zero permits all interrupts with non-zero priority, whereas a value of 7 masks all interrupts.
| Base Address = 0x0C20_0000 | ||||
|---|---|---|---|---|
| Bits | Field Name | Attributes | Reset | Description |
| [2:0] | Threshold | RW | X | Sets the priority threshold. |
| [31:3] | Reserved | WIRI | X | — |