U54 RISC-V Application Cores

The following table describes the features of the U54 application cores.

Table 1. U54 RISC-V Application Cores Features
Feature	Description
ISA	RV64GC ⁽¹⁾
iCache/ITIM	32 KB 8-way set-associative/28 KB ITIM
dCache	32 KB 8-way set-associative
ECC Support	ECC on iCache, ITIM, and dCache
MMU	40-bit MMU compliant with Sv39
Modes	Machine mode, Supervisor mode, and User mode

Note:

Typically, in a system, the U54 cores are used to execute any of the following:

Note: Load-Reserved and Store-Conditional atomic instructions (lr, sc) are supported on U54 processor cores.