Machine Exception Delegation Register (medeleg)

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The register description of the medeleg register is provided in the following table.

Table 1. Machine Exception Delegation Register (medeleg)
Bits Attributes Description
0 WARL Instruction address misaligned
1 WARL Instruction access fault
2 WARL Illegal Instruction
3 WARL Breakpoint
4 WARL Load address misaligned
5 WARL Load access fault
6 WARL Store/AMO address misaligned
7 WARL Store/AMO access fault
8 WARL Environment call from U-mode
9 WARL Environment call from S-mode
[11:10] WARL Reserved
12 WARL Instruction page fault
13 WARL Load page fault
14 WARL Reserved
15 WARL Store/AMO page fault exception
[63:16] WARL Reserved