Address and Data Trace on DDR Controller

The Trace block can be used to monitor the following:

Address trace on the AXI 128 bus connected to DDR cached region.
Data trace on S7 slave (AXI 64) connected to DDR non-cached region.

Address and data trace for DDR controller involves the following steps:

1.Programming the design on the PolarFire SoC device.
2.Running the firmware to create traffic on S7 (AXI 64) and AXI(128) buses using SoftConsole.
3.Discovering the required Trace modules using SoftConsole.
4.Configuring the AXI Monitor 0 and AXI Monitor 1 using SoftConsole.
5.Running and monitoring the data and address trace data using SoftConsole.

Note: The monitored address trace from AXI Monitor 1 module must match with the addresses used in the firmware. Also, the monitored data trace from AXI Monitor 0 module must match with the data sent or received on S7.

The following figure shows the required trace modules and the flow involved in DDR controller data and address trace.

Figure 1. Data and Address Trace