Address Range

The following table lists the FIC address range in the MSS. FIC0 and FIC1 has two regions, which can be configured using the MSS configurator.

Table 1. FIC Memory Map
FIC Interface	No. of Regions	Start Address	End Address	Description
FIC0	2	0x60000000	0x7FFFFFFF	512 MB
FIC0	2	0x20_00000000	0x2F_FFFFFFFF	64 GB
FIC1	2	0xE0000000	0xFFFFFFFF	512 MB
FIC1	2	0x30_00000000	0x3F_FFFFFFFF	64 GB
FIC3	1	0x40000000	0x5FFFFFFF	512 MB

Note: FIC2 is an AXI4 slave interface from the FPGA fabric and does not show up on the MSS memory map. FIC4 is dedicated to the User Crypto Processor and does not show up on the MSS memory map.