To double the number of timers and PWM channels in the TCA, a Split mode is provided. In this Split mode, the 16-bit timer/counter acts as two separate 8-bit timers, which each have three compare channels for PWM generation. The Split mode will only work with single-slope down-count. Event controlled operation is not supported in Split mode.
The figure below shows single-slope PWM generation in Split mode. The waveform generator output is cleared at BOTTOM, and set on compare match between the counter value (TCAn.CNT) and the Compare n (TCAn.CMPn) register.
Activating Split mode results in changes to the functionality of some registers and register bits. The modifications are described in a separate register map (see Register Summary - Split Mode).
When shifting between Normal mode and Split mode, the functionality of some registers
and bits changes, but their values do not. For this reason, disabling the peripheral
(ENABLE = 0
in the TCAn.CTRLA register) and doing a hard Reset (CMD
= RESET in the TCAn.CTRLESET register) is recommended when changing the mode to
avoid unexpected behavior.
1
’ to the Split mode enable (SPLITM) bit in the Control
D (TCAn.CTRLD) register.1
’ to the Enable (ENABLE) bit in the Control A
(TCAn.CTRLA) register.The counter will start counting clock ticks according to the prescaler setting in the Clock Select (CLKSEL) bit field in the TCAn.CTRLA register.