An interrupt must be initialized in the following order:
- 1.Configure the CPUINT if the default
configuration is not adequate (optional):
- Vector handling is configured by
writing to the respective bits (IVSEL and CVT) in the Control A (CPUINT.CTRLA)
register.
- Vector prioritizing by round robin
is enabled by writing a ‘
1
’ to the Round Robin Priority Enable
(LVL0RR) bit in CPUINT.CTRLA.
- Select the Priority Level 1 vector
by writing the interrupt vector number to the Interrupt Vector with Priority Level
1 (CPUINT.LVL1VEC) register.
- 2.Configure the interrupt conditions
within the peripheral and enable the peripheral’s interrupt.
- 3.Enable interrupts globally by writing a
‘
1
’ to the Global Interrupt Enable (I) bit in the CPU Status
(CPU.SREG) register.