Interrupt Control
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TRIGB | TRIGA | OVF | |||||
Access | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 |
Trigger B Interrupt Enable
Writing this bit to ‘1
’ enables the interrupt when
trigger input B is received.
Trigger A Interrupt Enable
Writing this bit to ‘1
’ enables the interrupt when
trigger input A is received.
Counter Overflow
Writing this bit to ‘1
’ enables the
restart-of-sequence interrupt or overflow interrupt.