The selection between CRC32 and CRC16
is done through fuse settings. The CRCSCAN can be configured to perform a code
memory scan before the device leaves Reset. If this check fails, the CPU is not allowed
to start normal code execution. This feature is enabled and controlled by the CRCSRC
field in FUSE.SYSCFG0 (see the Fuses section for more information).
If the CRCSCAN is enabled, a successful CRC check will have the following
outcome:
- Normal code execution starts
- The ENABLE bit in CRCSCAN.CTRLA
will be ‘
1
’
- The SRC bit field in CRCSCAN.CTRLB
will reflect the checked section(s)
- The OK flag in CRCSCAN.STATUS will
be ‘
1
’
If the CRCSCAN is enabled, a non-successful CRC check will have the
following outcome:
- Normal code execution does not
start. The CPU will hang executing no code.
- The ENABLE bit in CRCSCAN.CTRLA
will be ‘
1
’
- The SRC bit field in CRCSCAN.CTRLB
will reflect the checked section(s)
- The OK flag in CRCSCAN.STATUS will
be ‘
0
’
- This condition may be observed
using the debug interface