ADC - 12-Bit Differential Mode

Figure 1. Positive Gain Error vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V)

Figure 2. Positive Gain Error vs. Sample Rate (ADC Differential Mode, V_REFA = V_DD = 3.6V)

Figure 3. Negative Gain Error vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V)

Figure 4. Negative Gain Error vs. Sample Rate (ADC Differential Mode, V_REFA = V_DD = 3.6V)

Figure 5. Offset Error vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V)

Figure 6. Offset Error vs. Sample Rate (ADC Differential Mode, V_REFA = V_DD = 3.6V)

Figure 7. DNL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = -40°C)

Figure 8. DNL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 25°C)

Figure 9. DNL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 85°C)

Figure 10. DNL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 125°C)

Figure 11. INL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = -40°C)

Figure 12. INL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 25°C)

Figure 13. INL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 85°C)

Figure 14. INL vs. V_REFA (ADC Differential Mode @60 ksps, V_DD = 3.6V, T = 125°C)