System critical I/O register settings are protected from accidental modification. Flash self-programming is protected from accidental execution. This is handled globally by the Configuration Change Protection (CCP) register.
Changes to the protected I/O registers or bits, or execution of protected instructions, are only possible after the CPU writes a signature to the CCP register. The different signatures are listed in the description of the CCP register (CPU.CCP).
Once the correct signature is written by the CPU, interrupts will be ignored for the duration of the configuration change enable period. Any interrupt request (including non-maskable interrupts) during the CCP period will set the corresponding Interrupt flag as normal, and the request is kept pending. After the CCP period is completed, any pending interrupts are executed according to their level and priority.
There are two modes of operation: One for protected I/O registers, and one for protected self-programming.