To write to registers protected by CCP, the following steps are required:
Most
protected registers also contain a Write Enable/Change Enable/Lock bit. This bit must
be written to ‘1
’ in the same operation as the data are written.
The protected change is immediately disabled if the CPU performs write operations to the I/O register or data memory, if load or store accesses to Flash, NVMCTRL, or EEPROM are conducted, or if the SLEEP instruction is executed.