Figure 1. Gain Error vs.
VREFA (ADC Single Ended Mode @60 ksps,
VDD = 3.0V)
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Figure 2. Gain Error vs.
Sample Rate (ADC Single Ended Mode, VREFA =
VDD = 3.0V)
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Figure 3. Offset Error
vs. VREFA (ADC Single Ended Mode @60 ksps,
VDD = 3.0V)
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Figure 4. Offset Error
vs. Sample Rate (ADC Single Ended Mode, VREFA =
VVDD = 3.0V)
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Figure 5. DNL vs. ADC
code (ADC Single Ended Mode @60 ksps, VDD =
3.0V)
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Figure 6. INL vs. ADC
code (ADC Single Ended Mode @60 ksps, VDD =
3.0V)
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Figure 7. DNL vs.
VREFA (ADC Single Ended Mode @60 ksps,
VDD = 3.0V, T = 125°C)
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Figure 8. DNL vs. Sample
Rate (ADC Single Ended Mode, VREFA = VDD =
3.0V, T = 125°C)
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Figure 9. INL vs.
VREFA (ADC Single Ended Mode @60 ksps,
VDD = 3.0V, T = 125°C)
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Figure 10. INL vs. Sample
Rate (ADC Single Ended Mode, VREFA = VDD =
3.0V, T = 125°C)
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