Peripheral Address Map

The address map shows the base address for each peripheral. For a complete register description and summary for each peripheral, refer to the respective peripheral sections.

Table 1. Peripheral Address Map
Base Address Name Description 28-Pin 32-Pin 48-Pin
0x0000 VPORTA Virtual Port A X X X
0x0004 VPORTB Virtual Port B     X
0x0008 VPORTC Virtual Port C X X X
0x000C VPORTD Virtual Port D X X X
0x0010 VPORTE Virtual Port E     X
0x0014 VPORTF Virtual Port F X X X
0x001C GPR General Purpose Registers X X X
0x0030 CPU CPU X X X
0x0040 RSTCTRL Reset Controller X X X
0x0050 SLPCTRL Sleep Controller X X X
0x0060 CLKCTRL Clock Controller X X X
0x0080 BOD Brown-out Detector X X X
0x00A0 VREF Voltage Reference X X X
0x0100 WDT Watchdog Timer X X X
0x0110 CPUINT Interrupt Controller X X X
0x0120 CRCSCAN Cyclic Redundancy Check Memory Scan X X X
0x0140 RTC Real-Time Counter X X X
0x01C0 CCL Configurable Custom Logic X X X
0x0200 EVSYS Event System X X X
0x0400 PORTA Port A Configuration X X X
0x0420 PORTB Port B Configuration     X
0x0440 PORTC Port C Configuration X X X
0x0460 PORTD Port D Configuration X X X
0x0480 PORTE Port E Configuration     X
0x04A0 PORTF Port F Configuration X X X
0x05E0 PORTMUX Port Multiplexer X X X
0x0600 ADC0 Analog-to-Digital Converter 0 X X X
0x0680 AC0 Analog Comparator 0 X X X
0x0688 AC1 Analog Comparator 1 X X X
0x0690 AC2 Analog Comparator 2 X X X
0x06A0 DAC0 Digital-to-Analog converter 0 X X X
0x06C0 ZCD0 Zero-Cross Detector 0 X X X
0x06C8 ZCD1 Zero-Cross Detector 1     X
0x07C0 PTC Peripheral Touch Controller X X X
0x0800 USART0 Universal Synchronous Asynchronous Receiver Transmitter 0 X X X
0x0820 USART1 Universal Synchronous Asynchronous Receiver Transmitter 1 X X X
0x0840 USART2 Universal Synchronous Asynchronous Receiver Transmitter 2 X X X
0x0860 USART3 Universal Synchronous Asynchronous Receiver Transmitter 3     X
0x0880 USART4 Universal Synchronous Asynchronous Receiver Transmitter 4     X
0x0900 TWI0 Two-Wire Interface 0 X X X
0x0920 TWI1 Two-Wire Interface 1   X X
0x0940 SPI0 Serial Peripheral Interface 0 X X X
0x0960 SPI1 Serial Peripheral Interface 1 X X X
0x0A00 TCA0 Timer/Counter Type A instance 0 X X X
0x0A40 TCA1 Timer/Counter Type A instance 1     X
0x0B00 TCB0 Timer/Counter Type B instance 0 X X X
0x0B10 TCB1 Timer/Counter Type B instance 1 X X X
0x0B20 TCB2 Timer/Counter Type B instance 2 X X X
0x0B30 TCB3 Timer/Counter Type B instance 3     X
0x0B80 TCD0 Timer/Counter Type D instance 0 X X X
0x0F00 SYSCFG System Configuration X X X
0x1000 NVMCTRL Nonvolatile Memory Controller X X X
Table 2. System Memory Address Map
Base Address Name Description 28-Pin 32-Pin 48-Pin
0x1040 LOCK Lock Bits X X X
0x1050 FUSE User Configuration X X X
0x1080 USERROW User Row X X X
0x1100 SIGROW Signature Row X X X
Parent topic: Peripherals and Architecture