The purpose of the Power-on Reset (POR) is to ensure a safe start-up of logic and memories. It is generated by an on-chip detection circuit and is always enabled. The POR is activated when the VDD rises and gives active reset as long as VDD is below the POR threshold voltage (VPOR). The reset will last until the Start-up and reset initialization sequence is finished. The Start-up Time (SUT) is determined by fuses. Reset is activated again, without any delay, when VDD falls below the detection level (VPORR).
Figure 1. MCU Start-Up,
RESET Tied to VDD
