Data Direction Clear
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DIRCLR[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Data Direction Clear
Writing a ‘0
’ to bit n in this bit field has no
effect.
Writing a ‘1
’ to bit n in this bit field will
clear the corresponding bit in PORTx.DIR, which will configure pin n (Pxn) as an
input-only pin and disable the output driver.
Reading this bit field will return the value of PORTx.DIR.