8-bit AVR Microcontroller

General Timer/Counter Control Register

Name:
GTCCR
Offset:
0x2F
Reset:
0x00
Access:
-
Bit76543210
TSMREMAPPSR
AccessR/WR/WR/W
Reset000

Bit 7 – TSM: Timer/Counter Synchronization Mode

Timer/Counter Synchronization Mode

Writing the TSM bit to '1' activates the Timer/Counter Synchronization mode. In this mode, the value that is written to the PSR bit is kept, hence keeping the Prescaler Reset signal asserted. This ensures that the Timer/Counter is halted and can be configured without the risk of advancing during configuration. When the TSM bit is written to '0', the PSR bit is cleared by hardware, and the Timer/Counter start counting.

Bit 1 – REMAP

This bit controls how the TIMER pins are mapped to pins as shown in the table:
REMAP TO_CLK OC0B OC0A ICP0 NOTE
0 PA0 PA1 PB1 PB2 DEFAULT
1 PB3 PA5 PA3 PA4 REMAPPED

Bit 0 – PSR: Prescaler 0 Reset Timer/Counter 0

Prescaler 0 Reset Timer/Counter 0

When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared immediately by hardware, except if the TSM bit is set.