The Port B pins with alternate functions are shown in the table below:
Port Pin | Alternate Functions |
---|---|
PB[0] |
ADC4: ADC Input Channel 4 PCINT8: Pin Change Interrupt source 8 |
PB[1] |
ADC5: ADC Input Channel 5 OC0A: Timer/Counter0 Compare Match A Output (default PCINT9: Pin Change Interrupt source 9 INT0: External Interrupt 0 Source CLKO: System Clock Output |
PB[2] |
ADC6: ADC Input Channel 6 ICP0: Timer/Counter0 Input Capture Input (default TxD0: USART Output PCINT10: Pin Change Interrupt source 10 |
PB[3] |
ACO: AC Output ADC7: ADC Input Channel 7 T0: Timer/Counter0 Clock Source (alternative location) RxD0: USART Input PCINT11: Pin Change Interrupt source 11 |
The following tables relate the alternate functions of Port B to the overriding signals shown in the figure of Alternate Port Functions.
Signal Name | PB3/ADC7/ACO/RxD0/T0/PCINT11 | PB2/ADC6/TxD0/ICP0/PCINT10 |
---|---|---|
PUOE | ACOE | TxEN0 |
PUOV | 0 | 0 |
DDOE | RxEN0 + (RxEN0 • ACOE) | TxEN0 |
DDOV | ACOE | TxEN0 |
PVOE | ACOE | TxEN0 |
PVOV | ACO • ACOE | TxEN0• TXD0_OUT |
PTOE | 0 | 0 |
DIEOE | (PCINT11 • PCIE1) + ADC7D | (PCINT10 • PCIE1) + ADC6D |
DIEOV | PCINT11• PCIE1 | PCINT10 • PCIE1 |
DI | RxD0/T0/PCINT11 Input | ICP0/PCINT10 input |
AIO | ADC7/ AC Output | ADC6 |
Signal Name | PB1/ADC5/INT0/XCK0/CLKO/OC0A/PCINT9 | PB0/ADC4/PCINT8 |
---|---|---|
PUOE | CKOUT(1) | 0 |
PUOV | 0 | 0 |
DDOE | CKOUT(1)+ (OC0A Enable • REMAP) + XCK0_MASTER | 0 |
DDOV | CLKO + (CKOUT • OC0A Enable • REMAP • OC0A) + (CKOUT • (OC0A Enable + REMAP) • XCK0_MASTER • XCK0_OUT) | 0 |
PVOE | CKOUT(1) | 0 |
PVOV | (system clock) | 0 |
PTOE | 0 | 0 |
DIEOE | (PCINT9 • PCIE1) + ADC5D + INT0 | (PCINT8 • PCIE1) + ADC4D |
DIEOV | (PCINT9 • PCIE1) + INT0 | (PCINT8 • PCIE1) |
DI | INT0/PCINT1 Input | PCINT8 Input |
AIO | ADC5 | ADC4 |