In order to change the contents of a protected I/O register, the CCP register must first be written with the correct signature. After CCP is written, the protected I/O registers may be written to during the next four CPU instruction cycles. All interrupts are ignored during these cycles. After these cycles interrupts are automatically handled again by the CPU, and any pending interrupts will be executed according to their priority.

When the protected I/O register signature is written, CCP[0] will read as one as long as the protected feature is enabled, while CCP[7:1] will always read as zero.

When the NVM self-programming signature is written, CCP[1] will read as one for four CPU instruction cycles , other bits will read as zero and CCP[1] will be cleared automatically after four cycles. The software should write data to flash high byte within this four clock cycles to execute self-programming.