Reset and Test Pins

  Signal Name Recommended Pin Connection Description
  NRST Application dependent.

Can be connected to a push button for hardware reset.

NRST is a bidirectional pin (Schmitt trigger input).

It is handled by the on-chip reset controller and can be driven low to provide a reset signal to the external components or asserted low externally to reset the microcontroller.

By default, the user reset is enabled after a general reset so that it is possible for a component to assert low and reset the microcontroller.

A permanent internal pullup resistor to VDDIO (100 kOhm) is available for user reset and external reset control.

  TST TST pin can be left unconnected in normal mode.

To enter in FFPI mode, TST pin must be tied to VDDIO.

In harsh environments (1), it is strongly recommended to tie this pin to GND if not used or to add an external low-value resistor (such as 10 kOhm).

This pin is a Schmitt trigger input.

Permanent internal pulldown resistor to GND (15 kOhm).

Must be tied to VDDIO to enter JTAG Boundary Scan, with JTAGSEL tied to VDDIO and PD0 tied to GND.

Note: 1. In a well-shielded environment subject to low magnetic and electric field interference, the pin may be left unconnected. In noisy environments, a connection to ground is recommended.