Security Features

When an undefined register access occurs, the URAD bit in the Interrupt Status Register (ICM_ISR) is set if unmasked. Its source is then reported in the Undefined Access Status Register (ICM_UASR). Only the first undefined register access is available through the ICM_UASR.URAT field.

Several kinds of unspecified register accesses can occur:

• Unspecified structure member set to one detected when the descriptor is loaded
• Configuration register (ICM_CFG) modified during active monitoring
• Descriptor register (ICM_DSCR) modified during active monitoring
• Hash register (ICM_HASH) modified during active monitoring
• Write-only register read access

The URAD bit and the URAT field can only be reset by writing a 1 to the ICM_CTRL.SWRST bit.