USART Interrupt Mask Register (LIN_MODE)
This configuration is relevant only if USART_MODE = 0xA or 0xB in the USART Mode Register.
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
Interrupt Mask
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
LINHTE | LINSTE | LINSNRE | LINCE | LINIPE | LINISFE | LINBE | |||
Access | |||||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
LINTC | LINID | LINBK | TXEMPTY | TIMEOUT | |||||
Access | |||||||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PARE | FRAME | OVRE | TXRDY | RXRDY | |||||
Access | |||||||||
Reset | 0 | 0 | 0 | 0 | 0 |
RXRDY Interrupt Mask
TXRDY Interrupt Mask
Overrun Error Interrupt Mask
Framing Error Interrupt Mask
Parity Error Interrupt Mask
Timeout Interrupt Mask
TXEMPTY Interrupt Mask
LIN Break Sent or LIN Break Received
LIN Identifier Sent or LIN Identifier Received Interrupt Mask
LIN Transfer Completed Interrupt Mask
LIN Bus Error Interrupt Mask
LIN Inconsistent Synch Field Error Interrupt Mask
LIN Identifier Parity Interrupt Mask
LIN Checksum Error Interrupt Mask
LIN Slave Not Responding Error Interrupt Mask
LIN Synch Tolerance Error Interrupt Mask
LIN Header Timeout Error Interrupt Mask