Overview

The RSTC is made up of an NRST manager and a reset state manager. It runs at SLCK frequency and generates the following reset signals:

• proc_nreset: Processor reset line (also resets the Watchdog Timer)
• periph_nreset: Affects the whole set of embedded peripherals
• nrst_out: Drives the NRST pin

These reset signals are asserted by the RSTC, either on events generated by peripherals, events on the NRST pin, or on a software action. The reset state manager controls the generation of reset signals and provides a signal to the NRST manager when an assertion of the NRST pin is required.

The NRST manager shapes the NRST assertion during a programmable time, thus controlling external device resets.

The RSTC Mode register (RSTC_MR), used to configure the RSTC, is powered with VDDIO, so that its configuration is saved as long as VDDIO is on.