PWM_OSC

PWM Output Selection Clear Register

  0x50 32 Write-only –  
Parent topic: Register Summary

PWM Output Selection Clear Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
          OSCL3 OSCL2 OSCL1 OSCL0  
Access          W W W W  
Reset          0 0 0 –  
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
          OSCH3 OSCH2 OSCH1 OSCH0  
Access          W W W W  
Reset          0 0 0 –  

Bits 0, 1, 2, 3 – OSCHx: Output Selection Clear for PWMH output of the channel x

Output Selection Clear for PWMH output of the channel x

ValueDescription
0

No effect.
1

Dead-time generator output DTOHx selected as PWMH output of channel x.

Bits 16, 17, 18, 19 – OSCLx: Output Selection Clear for PWML output of the channel x

Output Selection Clear for PWML output of the channel x

ValueDescription
0

No effect.
1

Dead-time generator output DTOLx selected as PWML output of channel x.