PIO_IMR

PIO Interrupt Mask Register

  0x0048 32 Read-only 0x00000000  

PIO Interrupt Mask Register

Bit  31 30 29 28 27 26 25 24  
  P31 P30 P29 P28 P27 P26 P25 P24  
Access                   
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  P23 P22 P21 P20 P19 P18 P17 P16  
Access                   
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  P15 P14 P13 P12 P11 P10 P9 P8  
Access                   
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  P7 P6 P5 P4 P3 P2 P1 P0  
Access                   
Reset  0 0 0 0 0 0 0 0  

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – P: PIO Input Change Interrupt Mask

PIO Input Change Interrupt Mask

ValueDescription
0 Input change interrupt is disabled on the I/O line.
1 Input change interrupt is enabled on the I/O line.