USBHS_HSTFNUM

Host Frame Number Register

  0x0420 32 Read/Write 0x00000000  

Host Frame Number Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
  FLENHIGH[7:0]  
Access                   
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
      FNUM[10:5]  
Access                   
Reset      0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  FNUM[4:0] MFNUM[2:0]  
Access                   
Reset  0 0 0 0 0 0 0 0  

Bits 2:0 – MFNUM[2:0]: Micro Frame Number

Micro Frame Number

This field contains the current microframe number (can vary from 0 to 7), updated every 125  μs.

When operating in Full-speed mode, this field is tied to zero.

Bits 13:3 – FNUM[10:0]: Frame Number

Frame Number

This field contains the current SOF number.

This field can be written. In this case, the MFNUM field is reset to zero.

Bits 23:16 – FLENHIGH[7:0]: Frame Length

Frame Length

In High-speed mode, this field contains the 8 high-order bits of the 16-bit internal frame counter (at 30  MHz, the counter length is 3750 to ensure a SOF generation every 125 μs).