PMC_USB

PMC USB Clock Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.

  0x0038 32 Read/Write 0x00000000  

PMC USB Clock Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
          USBDIV[3:0]  
Access                   
Reset          0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
                USBS  
Access                   
Reset                0  

Bit 0 – USBS: USB Input Clock Selection

USB Input Clock Selection

ValueDescription
0

USB_48M input is PLLA.

1

USB_48M input is UPLL.

Bits 11:8 – USBDIV[3:0]: Divider for USB_48M

Divider for USB_48M

USB_48M is input clock divided by USBDIV+1.