Supply Controller Status Register
This register is located in the VDDIO domain.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
WKUPIS[13:8] | |||||||||
Access | R | R | R | R | R | R | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
WKUPIS[7:0] | |||||||||
Access | R | R | R | R | R | R | R | R | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
LPDBCS1 | LPDBCS0 | ||||||||
Access | R | R | |||||||
Reset | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
OSCSEL | SMOS | SMS | SMRSTS | BODRSTS | SMWS | WKUPS | |||
Access | R | R | R | R | R | R | R | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
WKUP Wakeup Status (cleared on read)
Value | Description |
---|---|
0 |
(NO): No wakeup due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. |
1 |
(PRESENT): At least one wakeup due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. |
Supply Monitor Detection Wakeup Status (cleared on read)
Value | Description |
---|---|
0 |
(NO): No wakeup due to a supply monitor detection has occurred since the last read of SUPC_SR. |
1 |
(PRESENT): At least one wakeup due to a supply monitor detection has occurred since the last read of SUPC_SR. |
Brownout Detector Reset Status (cleared on read)
When the voltage remains below the defined threshold, there is no rising edge event at the output of the brownout detection cell. The rising edge event occurs only when there is a voltage transition below the threshold.
Value | Description |
---|---|
0 |
(NO): No core brownout rising edge event has been detected since the last read of the SUPC_SR. |
1 |
(PRESENT): At least one brownout output rising edge event has been detected since the last read of the SUPC_SR. |
Supply Monitor Reset Status (cleared on read)
Value | Description |
---|---|
0 |
(NO): No supply monitor detection has generated a core reset since the last read of the SUPC_SR. |
1 |
(PRESENT): At least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. |
Supply Monitor Status (cleared on read)
Value | Description |
---|---|
0 |
(NO): No supply monitor detection since the last read of SUPC_SR. |
1 |
(PRESENT): At least one supply monitor detection since the last read of SUPC_SR. |
Supply Monitor Output Status
Value | Description |
---|---|
0 |
(HIGH): The supply monitor detected VDDIO higher than its threshold at its last measurement. |
1 |
(LOW): The supply monitor detected VDDIO lower than its threshold at its last measurement. |
32-kHz Oscillator Selection Status
Value | Description |
---|---|
0 |
(RC): The slow clock, SLCK, is generated by the slow RC oscillator. |
1 |
(CRYST): The slow clock, SLCK, is generated by the 32.768 kHz crystal oscillator. |
Low-power Debouncer Wakeup Status on WKUP0 (cleared on read)
Value | Description |
---|---|
0 |
(NO): No wakeup due to the assertion of the WKUP0 pin has occurred since the last read of SUPC_SR. |
1 |
(PRESENT): At least one wakeup due to the assertion of the WKUP0 pin has occurred since the last read of SUPC_SR. |
Low-power Debouncer Wakeup Status on WKUP1 (cleared on read)
Value | Description |
---|---|
0 |
(NO): No wakeup due to the assertion of the WKUP1 pin has occurred since the last read of SUPC_SR. |
1 |
(PRESENT): At least one wakeup due to the assertion of the WKUP1 pin has occurred since the last read of SUPC_SR. |
WKUPx ('x' = 0-13) Input Status (cleared on read)
Value | Description |
---|---|
0 |
(DIS): The corresponding wakeup input is disabled, or was inactive at the time the debouncer triggered a wakeup event. |
1 |
(EN): The corresponding wakeup input was active at the time the debouncer triggered a wakeup event since the last read of SUPC_SR. |