The following example describes how to output trace data in asynchronous trace mode.
Configure the TPIU for asynchronous trace mode. Refer to How to Configure the TPIU.
- 1.Enable the write accesses into the ITM registers by writing “0xC5ACCE55” into the Lock Access Register (Address: 0xE0000FB0)
- 2.Write 0x00010015 into the Trace Control register:
- Enable ITM.
- Enable Synchronization packets.
- Enable SWO behavior.
- Fix the ATB ID to 1.
- 3.Write 0x1 into the Trace Enable register:
- Enable the Stimulus port 0.
- 4.Write 0x1 into the Trace Privilege register:
- Stimulus port 0 only accessed in privileged mode (Clearing a bit in this register will result in the corresponding stimulus port being accessible in user mode.)
- 5.Write into the Stimulus port 0 register: TPIU (Trace Port Interface Unit)
The TPIU acts as a bridge between the on-chip trace data and the Instruction Trace Macrocell (ITM).
The TPIU formats and transmits trace data off-chip at frequencies asynchronous to the core.