MCAN_XIDAM

MCAN Extended ID AND Mask

This register can only be written if the bits CCE and INIT are set in MCAN CC Control Register.

  0x90 32 Read/Write 0x1FFFFFFF  

MCAN Extended ID AND Mask

Bit  31 30 29 28 27 26 25 24  
        EIDM[28:24]  
Access        R/W R/W R/W R/W R/W  
Reset        1 1 1 1 1  
Bit  23 22 21 20 19 18 17 16  
  EIDM[23:16]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  15 14 13 12 11 10 9 8  
  EIDM[15:8]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  7 6 5 4 3 2 1 0  
  EIDM[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  

Bits 28:0 – EIDM[28:0]: Extended ID Mask

Extended ID Mask

For acceptance filtering of extended frames the Extended ID AND Mask is ANDed with the Message ID of a received frame. Intended for masking of 29-bit IDs in SAE J1939. With the reset value of all bits set to one the mask is not active.