MCAN_TXBAR

MCAN Transmit Buffer Add Request

If an add request is applied for a Transmit Buffer with pending transmission request (corresponding MCAN_TXBRP bit already set), this Add Request is ignored.

  0xD0 32 Read/Write 0x00000000  
Parent topic: Register Summary

MCAN Transmit Buffer Add Request

Bit  31 30 29 28 27 26 25 24  
  AR31 AR30 AR29 AR28 AR27 AR26 AR25 AR24  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  AR23 AR22 AR21 AR20 AR19 AR18 AR17 AR16  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  AR15 AR14 AR13 AR12 AR11 AR10 AR9 AR8  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – ARx: Add Request for Transmit Buffer x

Add Request for Transmit Buffer x

Each Transmit Buffer has its own Add Request bit. Writing a ‘1’ will set the corresponding Add Request bit; writing a ‘0’ has no impact. This enables the processor to set transmission requests for multiple Transmit Buffers with one write to MCAN_TXBAR. MCAN_TXBAR bits are set only for those Transmit Buffers configured via TXBC. When no Transmit scan is running, the bits are reset immediately, else the bits remain set until the Transmit scan process has completed.

ValueDescription
0

No transmission request added.
1

Transmission requested added.