WDT_SR

Watchdog Timer Status Register

  0x08 32 Read-only 0x00000000  
Parent topic: Register Summary

Watchdog Timer Status Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
              WDERR WDUNF  
Access              R R  
Reset              0 0  

Bit 0 – WDUNF: Watchdog Underflow (cleared on read)

Watchdog Underflow (cleared on read)

ValueDescription
0

No watchdog underflow occurred since the last read of WDT_SR.
1

At least one watchdog underflow occurred since the last read of WDT_SR.

Bit 1 – WDERR: Watchdog Error (cleared on read)

Watchdog Error (cleared on read)

ValueDescription
0

No watchdog error occurred since the last read of WDT_SR.
1

At least one watchdog error occurred since the last read of WDT_SR.