ICM_CFG

ICM Configuration Register

  0x00 32 Read/Write 0x00000000  
Parent topic: Register Summary

ICM Configuration Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
  UALGO[2:0] UIHASH     DUALBUFF ASCD  
Access  R/W R/W R/W R/W     R/W R/W  
Reset  0 0 0 0     0 0  
Bit  7 6 5 4 3 2 1 0  
  BBC[3:0]   SLBDIS EOMDIS WBDIS  
Access  R/W R/W R/W R/W   R/W R/W R/W  
Reset  0 0 0 0   0 0 0  

Bit 0 – WBDIS: Write Back Disable

Write Back Disable

When ASCD is set, WBDIS has no effect.

ValueDescription
0

Write Back operations are permitted.
1

Write Back operations are forbidden. Context register CDWBN bit is internally set to one and cannot be modified by a linked list element. ICM_RCFG.CDWBN has no effect.

Bit 1 – EOMDIS: End of Monitoring Disable

End of Monitoring Disable

ValueDescription
0

End of Monitoring is permitted.
1

End of Monitoring is forbidden. The EOM bit of the ICM_RCFG structure member has no effect.

Bit 2 – SLBDIS: Secondary List Branching Disable

Secondary List Branching Disable

ValueDescription
0

Branching to the Secondary List is permitted.
1

Branching to the Secondary List is forbidden. The NEXT field of the ICM_RNEXT structure member has no effect and is always considered as zero.

Bits 7:4 – BBC[3:0]: Bus Burden Control

Bus Burden Control

This field is used to control the burden of the ICM system bus. The number of system clock cycles between the end of the current processing and the next block transfer is set to 2BBC. Up to 32,768 cycles can be inserted.

Bit 8 – ASCD: Automatic Switch To Compare Digest

Automatic Switch To Compare Digest

ValueDescription
0

Automatic monitoring mode is disabled.
1

The ICM passes through the Main List once to calculate the message digest of the monitored area. When WRAP = 1 in ICM_RCFG, the ICM begins monitoring.

Bit 9 – DUALBUFF: Dual Input Buffer

Dual Input Buffer

ValueDescription
0

Dual Input Buffer mode is disabled.
1

Dual Input Buffer mode is enabled (better performances, higher bandwidth required on system bus).

Bit 12 – UIHASH: User Initial Hash Value

User Initial Hash Value

ValueDescription
0

The secure hash standard provides the initial hash value.
1

The initial hash value is programmable. Field UALGO provides the SHA algorithm. The ALGO field of the ICM_RCFG structure member has no effect.

Bits 15:13 – UALGO[2:0]: User SHA Algorithm

User SHA Algorithm

ValueNameDescription
0 SHA1

SHA1 algorithm processed
1 SHA256

SHA256 algorithm processed
4 SHA224

SHA224 algorithm processed