PWM Output Selection Clear Update Register
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| OSCUPL3 | OSCUPL2 | OSCUPL1 | OSCUPL0 | ||||||
| Access | W | W | W | W | |||||
| Reset | 0 | 0 | 0 | – |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OSCUPH3 | OSCUPH2 | OSCUPH1 | OSCUPH0 | ||||||
| Access | W | W | W | W | |||||
| Reset | 0 | 0 | 0 | – |
Output Selection Clear for PWMH output of the channel x
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Dead-time generator output DTOHx selected as PWMH output of channel x at the beginning of the next channel x PWM period. |
Output Selection Clear for PWML output of the channel x
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Dead-time generator output DTOLx selected as PWML output of channel x at the beginning of the next channel x PWM period. |