When SMC_MODE.TDF_MODE is set to 1 (TDF optimization is enabled), the SMC takes advantage of the setup period of the next access to optimize the number of wait states cycle to insert.
The following figure shows a read access controlled by NRD, followed by a write access controlled by NWE, on Chip Select 0. Chip Select 0 has been programmed with:
nrd_hold = 4; SMC_MODE.read_mode = 1 (NRD controlled)
nwe_setup = 3; SMC_MODE.write_mode = 1 (NWE controlled)
SMC_MODE.TDF_CYCLES = 6; SMC_MODE.TDF_MODE = 1 (optimization enabled).
Figure 1. TDF Optimization: No TDF wait states are inserted if the TDF
period is over when the next access begins
