US_CR (SPI_MODE)

USART Control Register (SPI_MODE)

This configuration is relevant only if USART_MODE = 0xE or 0xF in the USART Mode Register.

  0x0000 32 Write-only    
Parent topic: Register Summary

USART Control Register (SPI_MODE)

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
          RCS FCS      
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                RSTSTA  
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
  TXDIS TXEN RXDIS RXEN RSTTX RSTRX      
Access                   
Reset                   

Bit 2 – RSTRX: Reset Receiver

Reset Receiver

ValueDescription
0 No effect.
1 Resets the receiver.

Bit 3 – RSTTX: Reset Transmitter

Reset Transmitter

ValueDescription
0 No effect.
1 Resets the transmitter.

Bit 4 – RXEN: Receiver Enable

Receiver Enable

ValueDescription
0 No effect.
1 Enables the receiver, if RXDIS is 0.

Bit 5 – RXDIS: Receiver Disable

Receiver Disable

ValueDescription
0 No effect.
1 Disables the receiver.

Bit 6 – TXEN: Transmitter Enable

Transmitter Enable

ValueDescription
0 No effect.
1 Enables the transmitter if TXDIS is 0.

Bit 7 – TXDIS: Transmitter Disable

Transmitter Disable

ValueDescription
0 No effect.
1 Disables the transmitter.

Bit 8 – RSTSTA: Reset Status Bits

Reset Status Bits

ValueDescription
0 No effect.
1 Resets the status bits OVRE, UNRE in US_CSR.

Bit 18 – FCS: Force SPI Chip Select

Force SPI Chip Select

Applicable if USART operates in SPI Master mode (USART_MODE = 0xE):

ValueDescription
0 No effect.
1 Forces the Slave Select Line NSS (RTS pin) to 0, even if USART is not transmitting, in order to address SPI slave devices supporting the CSAAT mode (Chip Select Active After Transfer).

Bit 19 – RCS: Release SPI Chip Select

Release SPI Chip Select

Applicable if USART operates in SPI Master mode (USART_MODE = 0xE):

ValueDescription
0 No effect.
1 Releases the Slave Select Line NSS (RTS pin).